Nanofabrication of silicon nanowires and nanoelectronic transistors

This project developed a robust and reliable process to pattern < 5 nm features in negative tone Hydrogen silsesquioxane (HSQ) resist using high resolution electron beam lithography and developed a low damage reactive ion etch (RIE) process to fabricate silicon nanowires on degenerately doped n-type silicon-on-insulator (SOI) substrates. A process to thermally grow high quality silicon dioxide (SiO2) (between 5-15 nm) is also developed to passivate onto the etched silicon nanowire devices to serve the purposes of gate dielectric and a diffusion barrier to minimize the donor deactivation. The measured interface state trap density (Dit) of the 10 nm thermally grown oxide is 1.3x10^10 cm^−2 eV^−1 with a breakdown voltage of ~7 V. Using optimized processes for lithography, dry etch and thermal oxidation, Hall bar and Greek cross devices are fabricated with mean widths from 45 to 4 nm on SOI substrates with a doping density ~ 2x10^19, 4x10^19, 8x10^19 and 2x10^20 atoms/cm^3 and electronically characterized at room and cryogenic temperatures (from 1.4 to 300 K) to allow resistivity, mobility and carrier density to be extracted directly as a function of temperature. This allowed to probe electron transport and scattering mechanisms in degenerately doped silicon nanowires. The mean free path is theoretically calculated and directly compared with the widths of the nanowires by which it can be approximated that the electron transport is 3 dimensional (3D) for the 12 nm wide nanowire which has likely to be changed to 2D and 1D for the 7 nm and 4 nm wide nanowires respectively. Moreover the experimental mobility is directly compared with a number of theoretically calculated mobilities using Matthiessen’s rule, where it has been determined that the neutral impurity scattering is the dominant scattering mechanism limiting the performance of silicon nanowires. Using silicon nanowires, junctionless transistors are fabricated on SOI substrate with a doping density ~ 4x10^19 atoms/cm^3 and electronically characterized at room and cryogenic temperatures (from 1.4 to 300 K). It was observed that reducing the width of channel from 24 to 8 nm, the transistor changed their operation from depletion to enhancement mode due to increase in the surface depletion at smaller length scales. Since the drain current in a junctionless transistor is proportional to the doping density, a high on-state drive current ~ 1.28 mA/µm has been observed with sub-threshold slope (SS) ~ 66 mV/decade at 300 K. Moreover temperature dependent measurements revealed a low SS ~ 39 mV/decade at 70 K and single electron oscillations at 1.4 K. Finally, independent arrays of 2 terminal nanowires devices with mean widths from 45 to 4 nm are fabricated on SOI substrate with a doping density ~ 8x10^19 atoms/cm^3 to detect polyoxometalate (POM) molecules [W18O54(SeO3)2]4−. A change in resistivity has been observed ~ 3.6 m ohm-cm (corresponds to ~ 13 % increase) when POM molecules are coated around the nanowires, shown n-type behaviour of molecules. POM molecules exhibit highly redox properties, therefore side-gated FETs with mean width ~ 4 nm were fabricated on SOI substrate with a doping density ~ 4x10^19 atoms/cm^3 where side-gate was used to apply alternative ± pulses of 20 V to charge and discharge the POM molecules to demonstrate flash memory operation. The average change in the threshold voltage was ~ 1.2 V between the charging (program) and the discharging (erase) cycles. The program/erase time is currently limited to 100 ms for a reasonable single-to-noise ratio. Moreover no significant decay in the stored charge has yet been measured over a period of 2 weeks (336 hours)

Alat Pendeteksi Kondisi Baik dan Buruk Keadaan Telur Berbasis Mikrokontroler ATMega8535

Alat ini dibuat dengan tujuan untuk mengetahui informasi tentang kondisi baik dan buruk keadaan telur ayam kampung. Selama ini, banyak metode manual yang tersedia yang dimanfaatkan untuk mengetahui kualitas telur ayam misalnya memanfaatkan sinar matahari atau senter untuk menyinari telur di tempat yang gelap kemudian melihat isi dari telur ayam yang akan diurutkan. Proses yang sama juga telah dilakukan peternak atau penjual untuk memilah kulitas telur ayamnya. Memanfaatkan metode manual untuk mendeteksi kualitas telur memerlukan waktu yang cukup lama karena waktu mendeteksi telur ayam satu demi satu akan mendapatkan resiko telur lepas dari tangan dan tentunya perlu waktu begitu lama. Maka dari itu dibuatlah alat pendeteksi telur dengan memanfaatkan sensor LDR (Light Dependent Resistor) sebagai pendeteksinya, LCD (Liquid Crystal Display) sebagai output keluaran tentang informasi kondisi telur dan Mikrokontroler ATMega8535 sebagai prosesor serta motor servo sebagai penanda apabila telur dalam keadaan buruk. Dari penelitian yang diadapatkan masih terdapat nilai error saat pendeteksian namun dapat disimpulkan bahwa sistem alat dapat bekerja dengan baik

Variability Study of High Current Junctionless Silicon Nanowire Transistors

Silicon nanowires have numerous potential applications, including transistors, memories, photovoltaics, biosensors and qubits [1]. Fabricating a nanowire with characteristics required for a specific application, however, poses some challenges. For example, a major challenge is that as the transistors dimensions are reduced, it is difficult to maintain a low off-current (Ioff) whilst simultaneously maintaining a high on-current (Ion). This can be the result of quantum mechanical tunnelling, short channel effects or statistical variability [2]. A variety of new architectures, including ultra-thin silicon-on-insulator (SOI), double gate, FinFETs, tri-gate, junctionless and gate all-around (GAA) nanowire transistors, have therefore been developed to improve the electrostatic control of the conducting channel. This is essential since a low Ioff implies low static power dissipation and it will therefore improve power management in the multi-billion transistor circuits employed globally in microprocessors, sensors and memories

Gender Recognition from Faces Using Bandlet and Local Binary Patterns

Abstract — In this paper, multi-scale bandlet and local binary pattern (LBP) based method for gender recognition from faces is proposed. Bandlet is one of the multi-resolution techniques that can adapt the orientation of the edges of the face images, and thereby can better capture the texture of a face image. After extracting bandlet coefficients from face images at different scales, LBP is applied to create a histogram, which is used as the feature to a minimum distance classifier. The experiments are performed using FERET grayscale face database, and the highest accuracy of 99.13 % is obtained with the proposed method

Studi Kasus Dampak Penerapan E-Government Terhadap Generation Z di Kota Palembang

Teknologi informasi mengalami perkembangan yang sangat pesat. Kementerian Komunikasi dan Informatika (Kemkominfo) menemukan bahwa 98 persen dari anak-anak dan remaja tahu tentang internet dan 79,5 persen diantaranya adalah pengguna internet. Pengaruh e- government pada generasi Z di Kota Palembang sudah berjalan dengan baik dari segi quality of public servise, trust, e-service quality, Perceived Usefulness. Jenis penelitian yang digunakan pada research ini adalah menggunakan quantitative research yang merupakan proses untuk menentukan pengetahuan yang menggunakan data berupa angka sebagai alat ukurnya. dari hasil uji terhadap 4 dimensi quality of public servise, trust, e-service quality, Perceived Usefulness pada ketiga e-government channel yang ada di Kota Palembang berbasis mobile, website, dan social media. E-government channel mobile mempunyai impact of e-government tertinggi dengan rata-rata persentase 98% dan Impact of e-government pada e-government channel social media mendapatkan hasil terendah dengan persentase 95%

STUDI EKSPERIMENTAL KUAT TEKAN DAN KUAT TARIK BELAH THIN BED MORTAR DENGAN PENAMBAHAN ZAT ADITIF BERBASIS POLYVINYL ACETATE

Bata ringan atau Autoclaved Aerated Concrete (AAC) merupakan bahan material pengisi dinding yang saat ini sering digunakan. Pemilihan bata ringan sebagai penyusun dinding bangunan karena memiliki bentuk yang seragam, beratnya yang ringan, dan dapat mempercepat kinerja pekerjaan dinding. Pemasangan bata ringan pada umumnya menggunakan mortar dengan lapisan tipis atau dapat disebut sebagai thin bed mortar. Meskipun dinding bukan termasuk bagian struktural pada bangunan, perlu adanya penelitian mengenai kekuatan pasangan bata ringan. Hal tersebut bertujuan untuk meminimalisir keruntuhan dinding bangunan akibat gaya lateral saat terjadi gempa. Tujuan dari penelitian ini yaitu untuk menciptakan komposisi baru thin bed mortar berbasis semen dengan penambahan polivinil asetat (PVAc) atau dapat disebut sebagai thin bed mortar inovasi (TBMI) untuk meningkatkan nilai kuat tekan dan kuat tarik belah pasangan bata ringan. Penggunaan PVAc pada TBMI diharapkan dapat meningkatkan kekuatan dan keamanan dinding bata ringan dan dapat menjadi alternatif dari penggunaan mortar instan. Penelitian ini dilakukan dalam lingkungan eksperimental dan mengikuti prosedur pengujian sesuai ASTM dan SNI. Hasil penelitian yang diperoleh yaitu TBMI dengan substitusi 15% PVAc terhadap berat semen mampu memberikan nilai kuat tekan pasangan bata ringan sama besar dengan mortar instan dan kuat tarik belah sebesar 23% lebih besar daripada mortar instan

Experimental and Simulation Study of a High Current 1D Silicon Nanowire Transistor Using Heavily Doped Channels

Silicon nanowires have numerous potential applications, including transistors, memories, photovoltaics, biosensors and qubits [1]. Fabricating a nanowire with the required characteristics for a specific application, however, poses some challenges. For example, a major challenge is that, as the transistors dimensions are reduced, it is difficult to maintain a low off-current (Ioff) whilst simultaneously maintaining a high on-current (Ion). Some sources of this parasitic leakage current include quantum mechanical tunnelling, short channel effects and statistical variability [2, 3]. A variety of new architectures, including ultra-thin silicon-on-insulator (SOI), double gate, FinFETs, tri-gate, junctionless and gate all-around (GAA) nanowire transistors, have therefore been developed to improve the electrostatic control of the conducting channel. This is essential since a low Ioff implies low static power dissipation and it will therefore improve power management in the multi-billion transistors circuits employed globally in microprocessors, sensors and memories